Cadence to buy Rambus’ SerDes and memory interface PHY IP business

The purchase  brings Cadence proven and experienced PHY engineering teams in the US, India and Canada.

“Memory and SerDes IP design and integration continues to be integral to the design of AI, data center and hyperscale applications, CPU architectures and networking devices, and the addition of the Rambus IP and seasoned team further accelerates Cadence’s Intelligent System Design strategy, which drives design excellence,” says Cadence svp Boyd Phelps, “the acquisition of the Rambus PHY IP broadens Cadence’s enterprise IP portfolio and expands its reach across geographies and vertical markets, such as the aerospace and defense market, providing complete subsystem solutions.”

“The accelerating momentum of AI and continued growth in the data centre is driving ever-increasing demand for memory and security,” says Rambus svp Sean Fan,  “with this transaction, we will increase our focus on market-leading digital IP and chips and expand our roadmap of novel memory solutions.”

The transaction is expected to close in Q3 and to be immaterial to revenue and earnings this year for each company.