GaN Power Transistors: Optimizing Fast Switching and Efficiency

GaN power transistors offer exceptional benefits like high transconductance and wide bandwidth, enabling rapid switching with minimal losses, even in demanding applications. However, the speed of these switches, along with the resulting high di/dt and dv/dt, poses design challenges for the main power loop, gate drive, and associated circuits.

These challenges extend beyond standalone transistors and drivers, impacting systems with co-packaged or integrated gate drive functions. This seminar provides insights into various HV GaN power transistor types, effective gate drive techniques, and strategies for isolating and powering gate drive circuits.

The seminar also addresses the interplay between fast switching and circuit/PCB parasitic impedances. It delves into potential issues and their resolution, shedding light on the origin and impact of parasitic impedance. Additionally, it covers optimizing loop inductances and utilizing copper planes and shields to guide currents accurately.

By understanding and adhering to these guidelines, you can enhance the success of your GaN designs and harness the power of these advanced transistors effectively.