Let more users benefit from the powerful Vivado and UltraFAST

I thought of writing this series of short articles on tools and methodology more than half a year ago. At that time, Vivado had been launched for two years, and I have contacted many customers and their designs one after another. My department is called “Tools & Methodology Applications”, which is actually a department dedicated to Vivado. Since Vivado’s early plans, my colleagues and I have invested in the promotion and support of xilinx and Vivado customers. , We provide training to customers, report on market activities, train and evaluate agents, and also go to the scene to support customers’ designs. In the past two years, Vivado has continued to mature, and customers have gone from being anxious and resisting to being fully accepted. However, with deeper technical exchanges with users, especially after contacting some agents’ FAEs and their customers’ designs, I gradually I found that many users of Vivado didn’t really understand its benefits, or in other words, they were either not in-depth enough, or there were many misunderstandings. Perhaps it is the limitation of the language, or the confusion over all kinds of PDF documents with hundreds of pages at every turn. I can feel that they need some more direct and targeted guidance.

I have been asking myself, is there an easy way to allow more Vivado users to benefit from our new technologies and products, so as to help them complete their designs better and faster?

After making up my mind, I began to look for topics of general interest from my daily work and feedback from everyone. I sorted into categories, selected examples, tried my best to use concise and clear text and narratives with clear illustrations, and kept an article within ten pages. Reading such an article may only take you lunch time. When you encounter a technical problem, you can quickly index the corresponding article with keywords. As an engineer, such small articles should be more welcome. Special thanks to many of my colleagues. Many of the examples and pictures in these articles are selected from the PPT created by them. What I can do is to use the experience of more Xilinx technical experts with familiar ones. The language spreads out and passes on.

There are three articles that have been completed so far, namely: “Tcl Application in Vivado”, “XDC Constraint Skills: Clock Chapter” and “XDC Constraint Skills: CDC Chapter”. According to the plan, it will continue to extend in these two directions, and Tcl will add two articles such as “Tcl-based ECO Process” and “Customized FPGA Design Process with Tcl”. XDC will have “XDC Constraint Skills IO Chapter”. The IO chapter is planned to be divided into two or three articles, covering different interfaces such as SDR, DDR, system synchronization, source synchronization and so on. Another direction is related to Vivado’s design process and timing closure. It will analyze the Timing report and analyze various strategies.

I hope that these articles can continue to be written down, as long as Vivado is still developing and our users have more needs, there will be updates. Of course, I also hope to get feedback from everyone, telling me what problems are bothering you, or what more targeted guidance is needed.