Thinking Beyond the LLC Series Resonant Converter Box

“The power industry widely uses LLC series resonant converters (LLC-SRC) as shown in Figure 1, which have two resonant inductors (two “L”: Lm and Lr) and a resonant capacitor (one “C” ”: C r ) as a low-cost, high-efficiency isolated power stage. LLC-SRCs have soft switching characteristics that do not require complex control schemes.

“

The power industry widely uses LLC series resonant converters (LLC-SRC) as shown in Figure 1, which have two resonant inductors (two “L”: Lm and Lr) and a resonant capacitor (one “C” ”: C r ) as a low-cost, high-efficiency isolated power stage. LLC-SRCs have soft switching characteristics that do not require complex control schemes. Its soft switching feature allows the use of components with lower voltage ratings and provides high converter efficiency. Its simple control scheme—variable frequency modulation with a fixed 50% duty cycle—requires lower controller cost than controllers used in other soft-switching topologies such as phase-shifted full-bridge converters .

Figure 1LLC-SRC

Although LLC-SRCs can achieve much higher efficiencies than hard-switched flyback and forward converters, there are still some design challenges if you want the best efficiency possible. First, in LLC-SRC designs, the ratio of the two resonant inductances (the ratio of L m to L r ) may have to be less than 10 in order to provide a wide enough controllable range. At the same time, you will need a large inductance on L m to reduce the circulating current – which means you need to keep the L r inductance large to keep the resonant inductance ratio low.

Interestingly, the current in the series resonant Inductor L r is entirely AC without any DC component – which means that the flux density varies considerably (ΔB is high). High ΔB means high AC-related inductor losses. If the inductor is wound on a ferrite-based core, the fringing effect near the core’s air gap results in higher winding losses.

Large inductance on L r means more inductance and higher AC winding losses. This is why many LLC-SRC designs use powder iron-based cores for resonant inductors to trade off winding losses and core losses. However, a high ΔB produces considerable losses on the resonant inductor – either high winding losses or high core losses.

The second challenge in LLC-SRC design is how to best optimize the synchronous rectifier (SR) control. LLC-SRC rectifier current conduction timing depends on load conditions and switching frequency. The most promising approach for LLC-SRC SR control is to sense the SR field effect transistor (FET) drain-source voltage (V DS ) and turn the SR on and off when V DS is below or above a certain level. The V DS sensing method requires millivolt-level accuracy and can therefore only be implemented in integrated circuits. Self-driven or other low-cost SR control schemes are not suitable for LLC-SRCs because of their current-fed capacitor-loaded output configuration. Therefore, the cost of the LLC-SRC SR controller circuit is usually higher than that of other topologies.

To address these two challenges – high inductor losses and SR control – and still take advantage of most of the advantages that a resonant converter can provide, consider using a modified CLL multi-resonant converter (CLL-MRC) as shown in Figure 2 Show.

Figure 2 Modified CLL-MRC

Unlike CLL-MRC where all three resonant elements (one capacitor and two inductors) are on the input side, the modified CLL-MRC moves one inductor from the input side to the output side and places the inductor after the rectifier CL o, as shown in Figure 2. This modification allows for the presence of DC current on the resonant inductor, which means smaller ΔB and possibly lower magnetic losses.

Having an inductor at the output also changes the output configuration from a current fed capacitor load configuration to a voltage fed inductor load configuration. The voltage-fed inductive load configuration enables a low-cost SR control scheme because you can use the inductor voltage for the sense signal.

Figure 3 illustrates the operation of the improved CLL-MRC, where f sw is the converter switching frequency and f r1 = {2π[C r (L r1 //L r2 )] 0.5 } -1 is one of the two resonant frequencies. When f sw is lower than f r1 , the output winding current drops to zero before the end of the switching cycle, just like the output winding current in LLC-SRC. Now you have an inductor at the output. A simple capacitor and resistor bank can sense the output inductor voltage. Each time a large rate of voltage change (dV/dt) occurs, it is time to turn the SR on or off. Therefore, the cost of the SR control scheme is lower than that of the V DS sensing scheme.

When f sw is higher than f r1 , the output inductor current operates in continuous conduction mode. In other words, ΔB becomes smaller, the inductor AC losses can be much smaller, and the converter efficiency can be higher than LLC-SRC.

Figure 3 Modified CLL-MRC key waveform: f sw f r1 (right)

To test these performance assumptions, I built LLC-SRC and modified CLL-MRC power stages with identical components and parameters. The only difference is the use of a 72μH inductor as the LLC-SRC resonant inductor and a 1μH inductor as the modified CLL-MRC output inductor.

Figure 4 shows the efficiency measurements for the two power stages. At lower input voltages, f sw is smaller than f r1 – so the Lo current in the modified CLL-MRC is still in discontinuous conduction mode with larger ΔB. Therefore, under this operating condition, the improved CLL-MRC has no efficiency advantage.

When the input voltage rises, fsw is higher than f r1 and the Lo current is in continuous conduction mode. The improved CLL-MRC is 1% more efficient than the LLC-SRC when using a 430V input. This comparison shows that if you design the improved CLL-MRC to always operate at frequencies higher than f r1, its efficiency performance may be better than that of the LLC-SRC over the entire range.

Figure 4 Converter efficiency at different input voltage levels: modified (top) CLL-MRC; (bottom) LLC-SRC

LLC-SRC is indeed a good topology and offers many attractive features. But depending on the application, it might not be the best solution. Sometimes you need to think outside the box to achieve higher efficiency at lower circuit cost.